tinyCLUNX33
System on Module with CrosslinkU-NX
|
The FPGA fabric features several Distributed RAM and Embedded Block RAM (EBR) that can be used through the RTL.
It also has two Large RAM (LRAM) blocks that provide can be used for storing larger memory buffers, such as entire frames, or as CPU main memory.
The Compute variant of the SoM additionally has an external OctalSPI or HyperRAM memory installed and interconnected with the FPGA.
Name | Num | Size (each) | Size (total) |
---|---|---|---|
Embedded Block RAM (EBR) | 64 | 18 kbit | 1153 kbit / 144 kByte |
Distributed RAM | - | 1 bit | 220 kbit / 27.5 kByte |
Large RAM (LRAM) | 5 | 512 kbit | 2560 kbit / 320 kByte |
External OctalRAM or HyperRAM | 1 | 64 Mbit | 64 Mbit / 8 MByte |
When using the Compute variant of the tinyCLUNX33, an OctalSPI or HyperRAM is available as buffer for processing the data or any purpose by the SoM.
It would then be already hooked to the FPGA pins, with the right pinout.
RTL synthesis tools such as Lattice Radiant offer to place the Embedded Block RAM (EBR) and Distributed RAM as part of the RTL language.
The LRAM has a blackbox-type module called NXLRAM that can be instancicated to allocate a given NXLRAM block.
The RTL Reference Design shows a possible integration of the NXLRAM as well as a controller for the external RAM chip.